Archives for Industry Notes

• 

  2009年亞太地區電子設計自動化會議

  2009年，在日本橫濱舉行的第十四屆亞太地區電子設計自動化會議，內容相當活潑，技術成果的發表也十分傑出。
• 

  Cost: FREE

  
  

• 

  Mentor Buys Valor

  Mentor’s acquisition of Valor reflects an increasing verticalization of the PCB design to manufacturing market. PCB is one of the most mature segments of the EDA industry. Where it once accounted for the largest segment of EDA revenue, it now represents less than 10% of total EDA revenue.
• 

  Cost: FREE

  
  

• 

  ARM TechCon: Is Cloud Computing Just A Dream and Intel vs. ARM

  Tom Starnes had an interesting panel at ARM Techcon this year. The topic of the panel was Cloud Computing but at the end the conversation turned into a look at the competitive battle between Intel and ARM.
• 

  Cost: FREE

  
  

• 

  Hot Chips and the Future of Computing

  Something was different at Hot Chips this year, significantly different: Parallel Computing. The IC industry's shift from single processor computing to multi-core has moved us away from the Von Neumann compute model to a undefined model... endangering Moore's Law.
• 

  Cost: FREE

  
  

• 

  DAC 2009 - The Congeniality DAC

  DAC is back. What was most evident was that the sense of community has returned...Social media, Sunday night, my favorite panel, Conference review.
• 

  Cost: FREE

  
  

• 

  Missing the Point

  Two acquisitions (Synfora- Esterel; Apache– Sequence) have been taken by some people as a continuation of the asset acquisitions we’ve been seeing recently.  This is a continuation of the Gloom and Doom school of thought.  Looks like some people are missing the point.
• 

  Cost: FREE

  
  

• 

  What To See @ DAC 2009 list

  The 14th annual ‘must see’ list of products includes ESL synthesis, ESL power, DRC/ Extraction, ASIC layout and Design Team E&A tools. This year we are going back to the basics. In order to receive permission to post the list on your website, you must purchase the Research Viewpoint
• 

  Cost: FREE

  
  

• 

  Smart Grids Bring Opportunities

  The planned investment in Smart Grids brings opportunities to EDA and Embedded Software companies. Discussion includes definition of smart grid, opportunities analysis, IT spending, and recent Standards activity.
• 

  Cost: FREE

  
  

• 

  EDP Review

  EDP again had an excellent technical program. 4 main themes: Network on Chip (NoC), RTL ASIC Hand-off, Automation of Analog Design and Parallel Computing. Gary takes an Honest Look at Parallelism with discussion of tech sessions and nVidia, Magma keynotes. EDP Presentations
• 

  Cost: FREE

  
  

• 

  Cadence Cuts Jobs

  The 5% layoff says that Cadence is recovering faster than expected. On the surface shutting down DFM looks like a good decision...Look a little closer however and it brings up a problem with their long term strategy
• 

  Cost: FREE

  
  

• 

  IC Package and PC Board Interfaces

  Surviving another industry downturn through exploration of IC package and PC Board interfaces. Details opportunities to mitigate effects of downturn and specifically examines opportunity to optimize the Chip-Package-System co-design for competitive advantages.
• 

  Cost: FREE

  
  

• 

  ASP-DAC Review

  Japan's top conference with highlights of Toshiba and IBM keynotes, ESL methodology panel. Prescriptive Design Rules (PDR) definition and advantages vs. RDRs
• 

  Cost: FREE

  
  

• 

  Intel Aqcuires Wind River

  continuing the re-aggregation of the Semiconductor software stack. Discussion includes motivations and trends with embedded software companies, Intel’s interest in the Embedded Market, where Wind River fits in and Impact on Embedded SW & EDA markets.
• 

  Cost: FREE

  
  

• 

  DATE 2009

  Dire predictions for DATE were wrong. The technical show was excellent and my favorite part of DATE, the hallway conversations, was as active as always. Reviews Keynotes and Panels. Discusses the relationship between Marketing, Sales and Trade Shows.
• 

  Cost: FREE

  
  

• 

  A Simple Explanation of Multi-core

  From Von Newmann to Moore's Law to Threads and Pipe-lining to the Power Crisis to SMP & AMP. Presently we are struggling to come up with a new Compute Model of Computation so that we can develop the SW architecture and tools needed to program multi-core ICs.
• 

  Cost: FREE

  
  

• 

  Concurrent Memory - A Call to Action

  The Von Neumann compute model is the sequential single processor architecture found in most computers today. As the Power problem increased, the semiconductor vendors moved to a multi-core architecture...solving the performance problem but abandoning the Von Neumann architecture...putting into jeopardy all the companies that have made a living based on the Von Neumann compute model; Microsoft, Intel.
• 

  Cost: FREE