Gary Smith EDA Consulting in Electronic Design
Gary Smith EDA (GSEDA) is the leading provider of market intelligence and advisory services for the global Electronic Design Automation (EDA), Electronic System Level (ESL) design, and related technology markets.
| Analyzed the mix of In-House tools and commercial tools, optimizing for best cost/competitive mix. |
| Set standard design language usage throughout a multi-division, multi-location design organization that had been fragmented by acquisitions. |
| Provided short lists or EDA vendors for benchmarking tools, lowering each benchmarking cost by $120,000. |
| Recommended design flows for mixed-signal ICs. |
| Provided comparable tool options for contract negotiations. |
| Worked on an internal team to upgrade the companies Designer from Mainstream to Power users (a four year program). |
| Set purchasing strategies to upgrade EDA vendor support, increasing design team efficiency and decreasing design costs. |
| Held a four month methodology review recommending design team changes that lowered overall costs. |
| Analyzed the use of off-shore resources and associated costs. |
| Restructured purchasing strategies to eliminate the costly purchase of non-optimal or seldom used EDA tools. |
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Industry Note
DAC 2010 – The Turn-a-Round DAC -
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DAC 2010 – The Turn-a-Round DAC
This year’s DAC had the right mix of Exhibits, Panels, Technical Sessions and attendees for emerging Electronic System Design (and ESL) Market. Attendance was high quality. Other topics: 3DICs, Peggy, Gadi Singer, Wallcharts and the electric cart experiment.

Cost: FREE
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Market Statistic
2009 Market Share -
Research Viewpoint
DFM Matures -
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DFM Matures
At 45nm and below, RDR (Restricted Design Rules) with DFM are common. How are RDR affecting designs? How can Mainstream and Power users design and compete as nodes shrink? Includes DFM Market Share 2008, DFM Forecast 2009, EDA Revenue and Cost of Design by User category (Power vs. Mainstream).

Cost: $500
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Research Viewpoint
Gary Smith EDA at DAC Presentations -
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Gary Smith EDA at DAC Presentations
Gary Smith Don’t Panic! SoC Costs "Will" Come Down EDA Industry is in a state of panic right now. Don't worry, once we get the price of an SoC Design under $25M, we'll resume healthy revenue growth.
Mary Olsson 3D Packaging Rises to the Level of Silicon Advances in 3D package design are putting the "A" back in EDA. However, miscommunication and design gaps at the silicon level still impact packaging performance.

Cost: $2,000
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Research Viewpoints
Research Viewpoints Archives | 2008 | 2009 | 2007-
DFM Matures
At 45nm and below, RDR (Restricted Design Rules) with DFM are common. How are RDR affecting designs? How can Mainstream and Power users design and compete as nodes shrink? Includes DFM Market Share 2008, DFM Forecast 2009, EDA Revenue and Cost of Design by User category (Power vs. Mainstream).
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Cost: $500
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3D Packaging Rises to the Level of Silicon
Advances in 3D package design are putting the "A" back in EDA. However, miscommunication and design gaps at the silicon level still impact packaging performance by
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Cost: $1,000
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CAE & CAD-CAM Wallchart RV: CAE (RTL and below) and CAD-CAM Wallcharts
Only a few changes to these WallCharts this year. As the methodology matures more and more of the sub-apps are being integrated into other tools. Includes each company addition by sub-application and analysis of the change in the sub-application.
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Cost: $500
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What To See at DAC Research Viewpoint
15th annual write up and Monday morning DAC pavilion presentation of 'must see' products at the 47th DAC 2010 with a detailed analysis of the products, categories and why you 'must see' them. To post/ reprint the list and/or use GSEDA logo, purchase the RV for $500.
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Cost: $500
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Gary Smith EDA at DAC Presentations
Gary Smith Don’t Panic! SoC Costs "Will" Come Down EDA Industry is in a state of panic right now. Don't worry, once we get the price of an SoC Design under $25M, we'll resume healthy revenue growth.
Mary Olsson 3D Packaging Rises to the Level of Silicon Advances in 3D package design are putting the "A" back in EDA. However, miscommunication and design gaps at the silicon level still impact packaging performance. -

Cost: $2,000
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Don’t Panic! SoC Costs "Will" Come Down
EDA Industry is in a state of panic right now. Don't worry, once we get the price of an SoC Design under $25M, we'll resume healthy revenue growth by Gary Smith
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Cost: $1,000
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ESL Wallchart RV: ESL Wallchart –The Battle is On
No major changes to the ESL WallChart this year. The big news is that the Big Three have now all woken up to the challenge. Includes each company addition by sub-application and analysis of the change in the sub-application.
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Cost: $500
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High Touch/ Low Touch Marketing and Sales in EDA
One of the surprises that ESL design is bringing to the EDA vendors concerns their sales and marketing channels. The chaos in the technical publications business points out the problem. Includes 2008 Seat Count at RTL and ESL as well as 5 recommendations for the Low Touch market. Write up and Powerpoint presentation included.
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Cost: $750
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4Q09 Analog/Mixed-Signal Financials
Analysis of revenue, trends in the market and indicators to watch for future growth. 3 Tables reviewing AMS Semi Companies: 4Q09 Earnings; Sequential Quarterly Earnings 3Q/ 4Q09; 4Q09 vs. 4Q08 Earnings. 2 Figures with analysis of R&D Investment and Application Revenue Share.
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Cost: $500.00
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Market Statistics
Market Statistics Archives | 2009 | 2008
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Industry Notes
Industry Notes Archives | 2009 | 2008 | 2007-
DAC 2010 – The Turn-a-Round DAC
This year’s DAC had the right mix of Exhibits, Panels, Technical Sessions and attendees for emerging Electronic System Design (and ESL) Market. Attendance was high quality. Other topics: 3DICs, Peggy, Gadi Singer, Wallcharts and the electric cart experiment.
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Cost: FREE
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The First Honest FPGA Pitch
Ok, so maybe I’m exaggerating, but Moshe’s (Xilinx) keynote at SNUG was certainly the first one I’ve seen. In the 1980s, the FPGA marketing establishment started exaggerating their capabilities. Moshe put an end to the exaggerated marketing claims because at 45nm an FPGA had enough gates to do true SoC designs.
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Cost: FREE
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DATE 2010: a Missed Opportunity for ESL Vendors
DATE 2010 was a pleasant surprise and success. The venue was good; the technical conference was excellent; attendance was high quality with the continued shift to Systems and Embedded engineers and the show floor was busy. ‘Why was the show floor so poorly attended by ESL vendors?’ Poor EDA marketing
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4 comments

Cost: FREE
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ARM TechCon: Is Cloud Computing Just A Dream and Intel vs. ARM
Tom Starnes had an interesting panel at ARM Techcon this year. The topic of the panel was Cloud Computing but at the end the conversation turned into a look at the competitive battle between Intel and ARM.
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3 comments

Cost: FREE
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What To See at DAC List
15th annual list of 'must see' products at the 47th DAC 2010. To post / reprint the list and/or use GSEDA logo, purchase the RV for $500. View the List for Free.
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Cost: FREE
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EDP 2010 – A Look at the Future of IC Design
This is a Methodologist’s Conference where presenters come in and present their ideas, not necessarily their conclusions, and then let the audience critique their approach. This makes for a rambunctious program. This year’s topics included: What Comes After CMOS and 3D-ICs.
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Cost: FREE
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Intel & TSMC: A Bad Deal
This was a bad idea to begin with. The only one that had anything to gain was TSMC. By trying to mimic the ARM model, Intel would have only cannibalized their own revenue stream. Intel cannot have it both ways (IDM and Fabless.) This is not a fight to the death.
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Cost: FREE
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Mentor Buys Valor
Mentor’s acquisition of Valor reflects an increasing verticalization of the PCB design to manufacturing market. PCB is one of the most mature segments of the EDA industry. Where it once accounted for the largest segment of EDA revenue, it now represents less than 10% of total EDA revenue.
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2 comments

Cost: FREE
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Hot Chips and the Future of Computing
Something was different at Hot Chips this year, significantly different: Parallel Computing. The IC industry's shift from single processor computing to multi-core has moved us away from the Von Neumann compute model to a undefined model... endangering Moore's Law.
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5 comments

Cost: FREE
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Wallcharts
Industry Notes Archives | 2009 -
definitions
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2010 Market Trends
ESL, RTL, IC CAD, PCB market share, forecast & analysis by sub-apps
Publish date: Oct 2010
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EDN
ESL synthesis: tips for implementing a viable ESL-synthesis flow -
Electro IQ
Gary Smith EDA market statistics 2010: Summary -
EDN
CEO on Mentor's role in IC and system design plus test -
Printed Circuit Design
EDA Ranking Shakeup First in Years -
Oregon Live.com
Mentor Graphics rebounds, but Carl Icahn casts a shadow























