Who We Are

A Chief Analyst with Gary Smith EDA. Previously, she was a Research Director in Gartner Dataquest’s Design and Engineering group, covering a broad range of technologies targeting the engineering community. Ms. Balch tracked market trends in EDA, Semiconductor Automated Test Equipment (ATE), Design for Test (DFT), Mechanical CAx Applications and Product Lifecycle Management (PLM).

Prior to joining Gartner, Ms. Balch worked for General Electric in the power generation business. She was a member of the GE Technical Leadership Program and held diverse roles in engineering, manufacturing and marketing. Ms. Balch holds a Bachelor of Engineering degree from The Cooper Union in New York City and an MBA in Marketing and Finance from Santa Clara University.

Areas of focus:
System-Level design and ESL, DFT and Test methodologies, IP and Enterprise tools, Circuit Analysis tools, Forecasting and Statistics

A Chief Analyst for Gary Smith EDA. She was previously Vice President of Research with Gartner Dataquest responsible for strategic competitive analysis on emerging process technologies in EDA and semiconductors, fabless and mixed-signal design companies. Before joining Gartner in 1981, Ms. Olsson worked for the Technology Analysis Group of Burroughs. Ms. Olsson holds a Bachelor of Arts degree from San Jose State University. Ms. Olsson has been a speaker on the industry for [email protected], ICCAD, the Chinese American Semiconductor Professional Association, Chinese Institute of Engineers, SEMI Financial Investment Conferences, SAC, ISHM/IEEE, IBM Technology Seminars and is currently a Board Member of the Microelectronics Packaging Technology Group.

Ms. Olsson also has written several articles and reports on the industry for IEEE, EDN, Semiconductor International, Red Herring, EE Times and MEPTEC. She has been an active volunteer for the Santa Clara Valley Junior Achievement Program, Leukemia Society, and the Bill Wilson Center’s Independent Living and Juvenile Hall Training Projects.

Areas of focus:
PCB, FPGAs, Analog and RF design tools, Semiconductor IDMs, Fabless Semiconductor vendors, and 3D IC vendors

A Principal Analyst with Gary Smith EDA. Previously, she was a Research Director at Gartner Dataquest, with responsibilities in a number of research areas, including mechanical CAx applications, product lifecycle management, EDA, biochips, and engineering/construction. Prior to joining Gartner, Ms. Tan worked as a research and development engineer for Loral Aerospace, where she developed image processing algorithms for military and commercial applications.

Ms. Tan holds a Master of Science degree in Engineering from the University of Illinois, and an MBA in Strategic Management and Finance from The Wharton School.

Areas of focus:
RTL design, Multi-Platform Based design, Mechanical and System-Level design tools

A Chief Analyst with Gary Smith EDA. Previously she was at Magma covering EDA research. The projects she involved including benchmarking and client spending vs. EDA TAM study. Prior to that, she was a Principal Analyst at Gartner Dataquest’s Design & Engineering group covering EDA and DFM with an emphasis on electronic design in Asia/Pacific. Before joining Gartner Dataquest, Ms. Wu worked for Avant! in various special projects include M&A, program management, and product migration. She held diverse roles in engineering, sales, field support, and finance. Earlier, she was a financial analyst in Core Pacific Investment and Consulting Company with focus on macroeconomics and transportation industry.

Ms. Wu earned her master degree in economics from University of Michigan, as well as a bachelor of arts in economics from National Taiwan University.

Areas of focus:
Heads up Asian office in Taipei, Taiwan supporting all areas of inquiry

An Advisor for Gary Smith EDA. She has extensive experience in software market coverage including Electronic Systems Level (ESL) design, Embedded systems design and development, middleware and applications, EDA, MEMS and nanotechnology. Previously she was a Research VP with Gartner in the Design and Engineering Group where she covered several mature and emerging markets receiving several awards for her efforts including the Gartner Thought Leadership award.

She writes extensively for various trade publications and journals and currently has an India focused technology trends blog hosted on EETIndia. She also speaks and presents at various industry forums.

Ms.Nadamuni has a Masters and Bachelor’s degree from Cambridge University, U.K and a bachelor’s degree from Bombay University, India.

Areas of focus:
Embedded Software, Multicore and ESL

The founder and Chief Analyst for Gary Smith EDA. Previously, he was the Managing Vice President and Chief Analyst of the Electronic Design Automation Service, Design & Engineering Cluster at Gartner Dataquest.

Prior to joining Gartner, Mr. Smith was a consultant in design methodology and worked in the ASIC end of the semiconductor business. While at LSI Logic, Mr. Smith became an evangelist for the RT-level design methodology. Starting in the semiconductor industry, Mr. Smith was involved in some of the first attempts at customer-designed ICs.

Mr. Smith earned his bachelor of science degree in engineering from the United States Naval Academy. He is a current member of the Design TWG for the International Semiconductor Road Map (ITRS), editorial chair of the IEEE Design Automation Technical Committee (DATC) and serves on the DAC Strategic Committee. He is also past Chair of the IEEE Electronic Design Processes conference. Mr. Smith has been quoted and published numerous times in all the Electronics Publications including EE Times, EDN, Electronic Business in addition to the Wall Street Journal and Business Week. In 2007, he received an ACM SIGDA Distinguished Service award.

Learn more about Gary Smith’s memorial.