Gary Smith EDA Consulting in Electronic Design

Gary Smith EDA (GSEDA) is the leading provider of market intelligence and advisory services for the global Electronic Design Automation (EDA), Electronic System Level (ESL) design, and related technology markets.

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    IBM's Transactional Memory

    IBM's Transactional Memory


    My apology for this being three months late, but if you read my last Industry Note you’ll know that I completely missed this announcement last August. Still it is important enough to write about even if it’s not timely.

    IBM’s Sequoia Super Computer uses the BlueGene/Q processors that uses an onboard Transactional Memory for the L2 cache. So what is a Transactional Memory? Basically it is a memory that automates the process of locking and unlocking memory, a major cause of computer crashes. You can say that the main reason for using Transactional Memory is reliability, but that is the number two reason. The number one reason is that it makes parallel computing significantly easier to program than memory that requires programmers to insert locks. Most researchers consider it the main roadblock for the adoption of parallel computing.

    Transactional Memory has been around for a while. Its main drawback has been latency; it’s slow. IBM overcame this problem a year or so ago but found that fast Transactional Memory was a power hog. They’ve now got the power down to the point where Transactional Memory works in a Super Computer Processor with a 55 Watt power envelope. Not bad progress for a few years of work. So far this doesn’t solve the multiprocessor (multi-chip) problem; it has to see all of the memory to prevent data corruption. Still it’s a great start. Now we need to squeeze more power out of the implementation and get it into the single chip SoC world of mobile computing.

    Our Expanding Scope

    I’ve been asked why Gary Smith EDA is following memory architecture; after all you’re an EDA (Electronic Design Automation) service. What we have found is that as the SoC architectures expand so does the needs of our User customer base. In the last ten years the definition of EDA has expanded greatly. In 2002 Daya Nadamuni stumbled over the parallel processing problem, and we’ve been following it ever since. Unfortunately the EDA Industry has been slow to follow their users. Just because the designers need to know what’s going on in the software world doesn’t translate to a successful service. We floated a trial balloon in January with the Embedded Software Research Viewpoint, but the response was disappointing so we didn’t follow it on with an Embedded Software Market Trends.

    Today we are being asked about Mechatronics or Mechanical Design. Laurie Balch covered that area when we were at Gartner Dataquest, but we decided not to offer a Mechanical service when we started out as Gary Smith EDA due to low interest for the offering. But it looks like we’ll be adding it to our line up in the relatively near future.

    So our scope is growing. Still if you want microprocessor marketing information contact Tom Starnes or Nathan Brookwood. If you want memory marketing information contact Jim Handy. If you want ASIC or SoC marketing information, contact Bryan Lewis at Gartner Dataquest. We are the design guys. But that means we need to follow the technology to do our job for the SoC designers.

    To view entire paper, download the PDF here

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